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12-Bit Plus Sign Temperature Sensors with
SMBus/I 2 C-Compatible Serial Interface
T MAX
T MAX - T HYST
T HIGH
T HIGH - T HYST
T LOW + T HYST
T LOW
ALERT
COMPARATOR MODE
ALERT
INTERRUPT MODE
OVERT
*
*
*
*
*
COMPARATOR MODE
ONLY
*IN INTERRUPT MODE, READING THE DEVICE CLEARS ALERT.
OTHERWISE, IT WOULD REMAIN LOW INDEFINITELY UNTIL CLEARED.
Figure 9. Alarm Output and Reset Diagram
bit. Registers T HIGH and T LOW are 16 bits, read/write,
and contain values that trigger ALERT and OVERT .
Register T HYST is 16 bits, read/write, and contains the
values by which the temperature must rise or fall
beyond T HIGH , T LOW , or T MAX , before ALERT or
OVERT deassert.
Temperature Conversion
An on-chip bandgap reference produces a signal pro-
portional to absolute temperature (PTAT), as well as the
temperature-stable reference voltage necessary for the
analog-to-digital conversion. The PTAT signal is digi-
tized by the on-board ADC to a resolution of 0.0625°C.
The resulting digital value is placed in the Temperature
register. The temperature conversion runs continuously
and asynchronously from the serial interface at a rate of
500ms per conversion. When the Temperature register
is read, the conversion in progress is aborted. The bus
transaction is completed by a stop condition.
Fault Queue (MAX6634/MAX6635)
A programmable fault queue on the MAX6634/
MAX6635 eliminates spurious alarm activity in noisy
environments. The queue sets the number of consecu-
tive out-of-tolerance temperature readings that must
occur before the ALERT or OVERT alarm outputs are
toggled. An out-of-tolerance reading is above T HIGH or
T MAX or below T LOW . The fault queue depth defaults to
1 at power-up and may be programmed—through the
Configuration register —to four consecutive conver-
sions. Any time the conversion result is in tolerance,
and the particular alarm output is not asserted, the
queue is cleared, even if it contains some out-of-toler-
ance counts. Additionally, the fault queue automatically
clears at power-up and in shutdown. Whenever the
fault queue is cleared, the alarm outputs are deassert-
ed. Figure 9 is the alarm output and reset diagram.
10
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